1. Field of the Invention
This invention relates in general to the photolithography fabrication of semiconductor integrated circuits (ICs), and more particularly to the method of removing photolesist at the edge of wafers in DRAM fabrications.
2. Description of Related Art
The photolithography process is the most important process in semiconductor integrated circuits. Patterns of each layer and doping regions are defined by the photolithography processes. Briefly, the integrity of the semiconductor integrated circuits depends on their dimensions. The ability to decrease the dimensions depends upon the development of photolithography.
The principle of photolithography is to coat a photoresist on the surface of each wafer and then to expose the photoresist by a mask. There are transparent and opaque regions on the mask so the photoresist is patterned. After development. the character of photoresist can be divided as dissoluble and indissoluble. If the exposed regions dissolve in the developer and the unexposed regions remain on the wafer the photoresist is called positive photoresist. The pattern formed by positive photoresist on the wafer is the same with the pattern on the mask. If the exposed regions do not dissolve in the developer and the exposed regions remain on the wafer, the photoresist is called negative photoresist. The pattern formed by negative photoresist on the wafer is opposite to the pattern on the mask.
Therefore the photolithography processes comprise coating, exposure, and development. The etching and implant processes are followed by patterning the photoresist. The photoresist at the edge of wafers would affect the settlement of wafers in chip boat. Additionally it would affect the central photoresist and cause the photoresist to peel. So the photoresist at the edge of wafers should be removed to avoid the above-mentioned disadvantages. The conventional method of removing the photoresist at the edges of waters is followed by exposing the photoresist. Additional exposure process is performed to define the photoresist, but this method will generate diffraction.
FIGS. 1a through 1d show the manufacturing progression of conducting lines in DRAM device according to a conventional method. This method explains how photoresist film loss at the edge of wafers is by the effect of diffraction. Referring to FIG. 1a, an inter-poly dielectric layer 12 is provided over substrate 10. A polysilicon layer 14 is provided over inter-poly dielectric layer 12. Then, a pattern is defined on polysilicone layer 14 and inter-poly dielectric layer 12 to form a contact window 15 exposing substrate 10. A thin polysilicon layer 16 is formed over polysilicon layer 14 and contact window 15.
Referring to FIG. 1b, a photoresist layer 18 is coated over the thin polysilicon layer 16. A pattern is defined oln the photoresist layer 18 by ultraviolet rays. Then, photoresist layer 18 at the edge of wafers is defined by wafer edge exposure.
Referring to FIG. 1c, after developing a photoresist layer 18a is formed. Referring to FIG. 1d, using a photoresist layer 18a as a mask. a thin polysilicon layer 16, a polysilicone layer 14 and an inter-poly dielectric layer 12 are etched to form a dielectric layer 12a, a polysilicon layer 14a and a thin polysilicon layer 16a. Therefore, a via 20 is formed by removing photoresist layer 18a.
FIG. 2 shows the top view of via 20 in the FIG. 1d. Because of the photoresist film loss at the edge of wafers, the photoresist layer losses the function of completely masking. Therefore, a wiring line 250 is formed by the above method which is thinner than what was predetermined and the pattern will distort. FIG. 3 shows the thickness of photoresist layer 110 on the wafer 100 according to the distance of the center of the wafer 100 by conventional method. The direction of arrow "a" represents the center of the wafer. The direction of arrow "b" represents the edge of the wafer. According to FIG. 3, the thickness of photoresist layer 110 decreases from the center of the wafer to the edge of the wafer.
Conventional DRAM devices use three polysilicon layers and one metal layer. Because of the effect of diffraction, defining a photoresist layer at the edge of the wafer by the adder edge exposure will cause the photoresist layer loss. The thickness of the photoresist layer will decrease from the center of the water to the edge of the wailer. It generates about 25 .mu.m width of transition region at the edge of the wafer. The photoresist film loss will cause the pattern transfer distortion. By using after etching inspection (ADI), we find that the conductive line pattern will become smaller and the via pattern will become larger. So some abnormal pattern will be generated in the interface among different layers. Some particles will be generated after thermal cycles or clean processes.